High-Order Cascade Multi-bit Σ∆ Modulators for High-Speed A/D Conversion

نویسندگان

  • R. del Rio
  • F. Medeiro
  • B. Pérez-Verdú
  • A. Rodríguez-Vazquez
چکیده

The use of Sigma-Delta (Σ∆) modulation for analog-to-digital conversion (ADC) in the communication frequency range is evaluated. Two high-order multi-bit architectures are proposed to achieve +12-bit dynamic range at 4Msample/s Nyquist rate using very low oversampling ratio. They show very low sensitivity to the internal D-to-A conversion (DAC) error with no calibration required. Simulations show that such performance can be achieved even in presence of circuit imperfections.

برای دانلود رایگان متن کامل این مقاله و بیش از 32 میلیون مقاله دیگر ابتدا ثبت نام کنید

ثبت نام

اگر عضو سایت هستید لطفا وارد حساب کاربری خود شوید

منابع مشابه

Multi - bit Cascade Σ ∆ Modulator for High - Speed A / D Conversion with Reduced Sensitivity to DAC Errors

Indexing terms: Multi-bit Σ∆ Modulators, High-speed, high-resolution A/D conversion. This paper presents a Σ∆ modulator (Σ∆M) which combines single-bit and multi-bit quantization in a cascade architecture to obtain high resolution with low oversampling ratio. It is less sensitive to the non-linearity of the DAC than those previously reported, thus enabling the use of very simple analog circuitr...

متن کامل

Practical considerations for the design of cascade multi-bit high-frequency Σ∆ modulators

Recommendations are given for efficient design of highfrequency Σ∆ modulators using multi-stage (cascade) multi-bit quantization architectures. These cover from pure architectural aspects to cell design with special emphasis on the impact of circuit imperfections. Conclusions are validated by measurements on a 13-bit 2.2MS/s prototype fabricated in a 0.7μm CMOS technology.

متن کامل

Critical path analysis of two-channel interleaved digital MASH ΔΣ modulators

Implementation of wireless wideband transmitters using ∆Σ DACs requires very high speed modulators. Digital MASH ∆Σ modulators are good candidates for speed enhancement using interleaving because they require only adders and can be cascaded. This paper presents an analysis of the integrator critical path of two-channel interleaved ∆Σ modulators. The bottlenecks for a high-speed operation are id...

متن کامل

High-speed All- Optical Time Division Multiplexed Node

In future high-speed self-routing photonic networks based on all-optical time division multiplexing (OTDM) it is highly desirable to carry out packet switching, clock recovery and demultplexing in the optical domain in order to avoid the bottleneck due to the optoelectronics conversion. In this paper we propose a self-routing OTDM node structure composed of an all-optical router and demultiplex...

متن کامل

A 74dB Dynamic Range, 1.1-MHz Signal Band 4th-Order 2-1-1 Cascade Multi-Bit CMOS Σ∆ Modulator for ADSL

This paper explores the use of Σ∆ techniques for A/D conversion exceeding 1-MHz signal bandwidth. A cascade modulator architecture is proposed which combines single-bit and multi-bit quantization to obtain more than 12-b Dynamic Range (DR) with an oversampling ratio of only 16, and with neither calibration nor trimming required. Measurements from a 0.7μm CMOS prototype show 74dB DR in 1.1-MHz s...

متن کامل

ذخیره در منابع من


  با ذخیره ی این منبع در منابع من، دسترسی به آن را برای استفاده های بعدی آسان تر کنید

عنوان ژورنال:

دوره   شماره 

صفحات  -

تاریخ انتشار 1998